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8b8d0b5eac
With MSVC, compiling with AVX2 support will also result in the generation of BMI2 instructions. Some early Haswell CPUs reportedly support AVX2 but not BMI2. We have seen crashes (illegal instruction) on these CPUs in our AVX2 code paths on MULX instructions (part of BMI2). Including a check for BMI2 when checking for AVX2 support is expected to solve the issue. Please see the bug referenced below for more background on this issue. Bug: chromium:1315519 Change-Id: I3a0a9838f1f632704ba505ecbb81a6f8b1889319 Reviewed-on: https://webrtc-review.googlesource.com/c/src/+/260323 Commit-Queue: Gustaf Ullberg <gustaf@webrtc.org> Reviewed-by: Sam Zackrisson <saza@webrtc.org> Reviewed-by: Henrik Andreasson <henrika@google.com> Reviewed-by: Niels Moller <nisse@webrtc.org> Cr-Commit-Position: refs/heads/main@{#36701}
116 lines
3.4 KiB
C++
116 lines
3.4 KiB
C++
/*
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* Copyright (c) 2011 The WebRTC project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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// Parts of this file derived from Chromium's base/cpu.cc.
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#include "rtc_base/system/arch.h"
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#include "system_wrappers/include/cpu_features_wrapper.h"
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#include "system_wrappers/include/field_trial.h"
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#if defined(WEBRTC_ARCH_X86_FAMILY) && defined(_MSC_VER)
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#include <intrin.h>
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#endif
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namespace webrtc {
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// No CPU feature is available => straight C path.
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int GetCPUInfoNoASM(CPUFeature feature) {
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(void)feature;
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return 0;
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}
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#if defined(WEBRTC_ARCH_X86_FAMILY)
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#if defined(WEBRTC_ENABLE_AVX2)
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// xgetbv returns the value of an Intel Extended Control Register (XCR).
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// Currently only XCR0 is defined by Intel so `xcr` should always be zero.
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static uint64_t xgetbv(uint32_t xcr) {
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#if defined(_MSC_VER)
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return _xgetbv(xcr);
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#else
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uint32_t eax, edx;
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__asm__ volatile("xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
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return (static_cast<uint64_t>(edx) << 32) | eax;
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#endif // _MSC_VER
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}
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#endif // WEBRTC_ENABLE_AVX2
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#ifndef _MSC_VER
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// Intrinsic for "cpuid".
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#if defined(__pic__) && defined(__i386__)
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static inline void __cpuid(int cpu_info[4], int info_type) {
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__asm__ volatile(
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"mov %%ebx, %%edi\n"
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"cpuid\n"
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"xchg %%edi, %%ebx\n"
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: "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
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"=d"(cpu_info[3])
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: "a"(info_type));
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}
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#else
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static inline void __cpuid(int cpu_info[4], int info_type) {
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__asm__ volatile("cpuid\n"
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: "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
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"=d"(cpu_info[3])
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: "a"(info_type), "c"(0));
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}
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#endif
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#endif // _MSC_VER
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#endif // WEBRTC_ARCH_X86_FAMILY
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#if defined(WEBRTC_ARCH_X86_FAMILY)
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// Actual feature detection for x86.
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int GetCPUInfo(CPUFeature feature) {
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int cpu_info[4];
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__cpuid(cpu_info, 1);
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if (feature == kSSE2) {
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return 0 != (cpu_info[3] & 0x04000000);
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}
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if (feature == kSSE3) {
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return 0 != (cpu_info[2] & 0x00000001);
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}
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#if defined(WEBRTC_ENABLE_AVX2)
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if (feature == kAVX2 &&
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!webrtc::field_trial::IsEnabled("WebRTC-Avx2SupportKillSwitch")) {
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int cpu_info7[4];
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__cpuid(cpu_info7, 0);
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int num_ids = cpu_info7[0];
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if (num_ids < 7) {
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return 0;
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}
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// Interpret CPU feature information.
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__cpuid(cpu_info7, 7);
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// AVX instructions can be used when
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// a) AVX are supported by the CPU,
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// b) XSAVE is supported by the CPU,
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// c) XSAVE is enabled by the kernel.
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// Compiling with MSVC and /arch:AVX2 surprisingly generates BMI2
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// instructions (see crbug.com/1315519).
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return (cpu_info[2] & 0x10000000) != 0 /* AVX */ &&
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(cpu_info[2] & 0x04000000) != 0 /* XSAVE */ &&
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(cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
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(xgetbv(0) & 0x00000006) == 6 /* XSAVE enabled by kernel */ &&
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(cpu_info7[1] & 0x00000020) != 0 /* AVX2 */ &&
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(cpu_info7[1] & 0x00000100) != 0 /* BMI2 */;
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}
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#endif // WEBRTC_ENABLE_AVX2
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return 0;
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}
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#else
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// Default to straight C for other platforms.
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int GetCPUInfo(CPUFeature feature) {
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(void)feature;
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return 0;
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}
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#endif
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} // namespace webrtc
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